PS Irradiation October 2000
- VAL_K3_166
Pre-Irradiation Characterization
A set of reference data was taken in B186 before the irradiation started.
Ipre = 220, Ishpr = 20, Edge Off, Compression Mode 1.
-
Trimming (both
links). 1 fC input, target 50% point of 82.5 mV on TrimRange 0 (Run
1666 scans 3-66). Removing a large amount of noisy channels and some non-trimmable
channels there are 1290 good channels. These noisy channels appeared during
module construction and they were already observed in Valencia.
-
Response
Curve. Qin = {0, 0.5, 1.0, 1.5, 2.0, 2.5, 3.0, 3.5, 4.0,
4.5, 5.0, 5.5, 6.0} (Run 1668 scans 1-13)
-
Time Walk.(link0 & link1).
Edge on. (Run 1668 scans 14-25)
-
Noise & Gain versus FE currents. Response curve for Qin = {1.0, 1.5,
2.0, 2.5} fC, linear fit at each current setting. Noise extracted at 1.5
fC. (Run1670 scans 1-32)
Evolution of Analogue Parameters
The analogue parameters are monitored during the irradiation, by means
of threshold scans for input charges Qin = {1.0, 1.5, 2.0, 2.5}
fC. This is done for Preamplifier currents Ipre = {100, 150,
200, 250} uA and shaper currents Ishpr = {20, 30} uA. These
scans are fitted with a linear response curve to extract the parameters.
Post-Irradiation Characterization
Optimisation of preamplifier currents:
-
Response curve for Qin = {1.0, 1.5, 2.0, 2.5} fC linear fit at preamplifier
currents Ipre = {100, 150, 200, 250} uA and shaper currents
Ishpr = {20, 30} uA. (Run1534 scans1-34)
-
Response curve for Qin = {2.0, 3.0} fC linear fit at preamplifier currents
Ipre = {128.8, 147.2, 165.6} uA and shaper currents Ishpr
= {18, 24, 30} uA. (Run1544 scans1-18)
-
Optimal current setting found to be Ipre = 128.8, Ishpr
= 24.
-
Trimming (link0 & link1).
1 fC input, target 50% point of 80 mV on TrimRange 3 gives 1136 trimmable
channels. (Run 1555 scans 1-16). There is clearly a problem with setting
the TrimDAC Range. The slopes of the TrimDAC plots indicates that the actual
TrimRange is not always 3 and varies from chip to chip. Hence the large
number of untrimmable channels. Not yet understood. Trim
and Mask files.
Digital Perfomance
Operating range before irradiation:
-
Vdd >= 3.3 V OK
-
Vdd = 3.2 Protocol Violations.
Clock duty cylcle (SLOG A02) (measured at crate level)
-
34% - 55% (Hex 1-F) OK
-
57% (Hex 0) Inefficiencies on readout.
After irradiation, correct digital response is received by:
@ Vdd = 4.0V OK if S3, S5, S9, S11, S12, S12 &
E13 bypassed
@ Vdd = 4.3V OK if S3, S9, S11, S12, E13 bypassed
@ Vdd = 4.0V OK if S3 & S11 bypassed
@ Vdd = 4.8V All chips OK
Chip origin: Batch 34685, Wafer ID5
| Chip |
M0
|
S1
|
S2
|
S3
|
S4
|
E5
|
M8
|
S9
|
S10
|
S11
|
S12
|
E13
|
| X |
9
|
10
|
11
|
7
|
5
|
8
|
10
|
14
|
4
|
7
|
11
|
13
|
| Y |
1
|
2
|
2
|
3
|
4
|
4
|
4
|
4
|
5
|
5
|
3
|
5
|
Power consumption
Before irradiation: (Vdd = 4.0V, Vcc = 3.5V, Vth = 500mV, Ipre = 220,
Ishpr = 20)
-
Idd = 444 mA (LVDS drivers on the support card not subtracted,
about 40 mA)
-
Icc = 795 mA
Plots before irradiation (chips trimmed 1fC represents 82.5 mV, LVDS drivers
not subtracted):
* All tests before irradiation made at Vbias = 135 V. Resistance on
the PT1000 = 1040 Ohms (temperature to be calibrated).